Archive for the 'Semiconductor' Category

Vision Summit explores strategies driving semicon industry growth

Sunday, February 11th, 2007

A couple of contrasting views over the fab technology direction that India should follow was reported from the ISA Vision Summit 2007. While one view stated that it’ll be prudent for India to initially establish manufacturing capacities in older technologies and address those requirements which are not addressed by the more competitive larger multinational companies. Else it will fall prey to overcapacity problem.

A conflicting view presented some of the alternate views of addressing the overcapacity situation. In India’s case, it can be by focusing on technologies which are driven by applications of the products required by the local market i.e. applications are the fab techno drivers and not any predetermined process geometry.

Intel and 45nm technology breakthrough

Monday, January 29th, 2007

Intel is hogging the silicon limelight with it’s news on the technology breakthrough - usage of high-k and metal gate transistors for 45nm technology.

Scaling without losing out much on leakage is the driving advantage. The major advantage, though, is that with this technique, Intel will not have to significantly change its current production process. This is different from the alternative solution being disclosed by IBM and its partners. The latter involves SOI which is a more expensive production technique and they plan to later switch to immersion lithography. Another lead for Intel is that the production with this new technique starts mid this year whereas IBM plans production in end 2008.

Having said that, it still appears that while Intel has stolen the lead in announcing the breakthrough with earlier production planned (and that too across servers, desktops and laptop applications), IBM will have a long term advantage as its technology involves integration of the metal gates so that they are embedded in silicon as compared to Intel where they sit atop a proven silicon architecture – thus solving long range problems and more future transitions.

Freescale places R&D bet with IBM

Thursday, January 25th, 2007

Another salvo to Crolles2 Alliance. After NXP’s announcement on its exit from Crolles2 Alliance, comes the statement from Freescale that it is joining the IBM Alliance.

Apart from investing in leading edge chip R&D, some of the potential benefits for Freescale in this alliance are leveraging capacity at Chartered and possible wireless co-development efforts with Infineon. Freescale also expects to significantly accelerate its SOI roadmap with this IBM partnership.

This leaves STM as the lone original member of the Crolles2 alliance. A potential new partner will need to have deep pockets to fund expansion of the group’s 300mm fab as well as work on 45nm and beyond processes. This is apart from a good fit from the technology standpoint. TI is touted as one of the possible candidates. However with the latest announcement from TI to end leading edge digital logic process development at 45nm and rely on foundries is set to have important implications on this.

NXP exits Crolles2 Alliance

Wednesday, January 17th, 2007

In its new avatar, Philips Semiconductor, now NXP exits Crolles2 Alliance, a partnership formed in 2000 and renewed in 2002, and teams up with TSMC.

As we further scale the technologies and the fab and associated costs increase, alliances is no longer an option; it’s mandatory. Amongst the present big ones, the Chartered, IBM, Samsung, Infineon alliance seems to be the more promising one overall. IBM is also reportedly in talks with the other two Crolles2 partners, STM and Freescale, to join Crolles2 Alliance.

Freescale had been pushing to get IBM into the Alliance while STM was pushing for TSMC. NXP has an asset lite strategy (it plans to increase its outsourcing ratio to 40% by 2010, from its present 10-20%) and it seems logical for it to strengthen its cooperation with its long time foundry partner, TSMC.

Private equity chips away at semiconductor industry

Tuesday, December 19th, 2006

A highly interesting article in Electronic Business by Tam Harbert.
Private equity firms target cash rich semiconductor entities, leverage on its cash flow to borrow more funds and then restructure, improve the company’s bottom line and then sell it or take it public; providing returns of 30-40%. Tam lists the reasons behind recent LBOs in the semiconductor space – industry being driven by the less cyclic consumer market, transition to fab-lite/fabless models and a better control over inventory.

The question which arises is that why hasn’t the chip industry taken the necessary steps to consolidate and leave that task to the private equity guys? iSupply’s Derek Lidow cites portfolio management as the reason. While chip companies, usually run by engineers structure the portfolio on technology, private equity folks tend to manage groups of products on market segments and geographical regions; rather than technology criterion. They acquire and merge companies that have similar product portfolios.

While on mergers and acquisitions, Mentor Graphics’ CEO, Wally Rhines mentioned in a recent article that the role of acquisitions in EDA industry is set to change. As the acquisitions in the past few years have failed to garner commensurate market capitalization, he opines that companies will either pay less for acquisitions or stop making them.

Moore’s Law

Friday, November 4th, 2005

The microelectronics industry owes much to Moore’s Law – the number of transistors on a chip double every 2 years. It’s a principle which has been solid and consistent for the last 3 decades.

In an article posted by Bill Roberts in Electronic Business, Satoru Ito, CEO of Renesas Technology says. “Because of Moore’s Law, the industry has had a common road map for technological innovation. This allows partnerships and planning for investment.”

It’s an economic barometer with geometric scaling transforming to economic scaling.

Moore’s Law has led to partnership. For no single entity, no matter how deep it’s pockets are and how well entrenched it is with brain power, can work out on it’s own the complexities in the microelectronics ecosystem paved by this law.

It has led to specialization. Semiconductor equipment materials, foundries, EDA, Contract manufacturing, IPs, yield management processes – it has spawned them all. It has spurred entrepreneurial culture without which technology’s potential could not have been realized. And with specialization and innovation not recognizing any geographical boundaries, it has further led to globalization. Biz interests make you go where there is infrastructure, cost saving, brain power, innovation – strategy reason. Moore’s law has sustained because it’s driven by pure economics. Geometric scaling is a prelude to diminishing the cost.

And it has also led to the omnipresent question - after Moore’s Law, what ???